busy day

Having 5 hours of lecture on monday was totally tiring for me, and i was like already half dead in d last lecture. Had Digital lab today , managed to do only 2 questions, and 1 question is umm, u know la, exchange logic tutor from JK. Luckily wasnt noticed by tutor. Holy shit lab we had, no proper JK flipflop chips and asked us to do the wrong circuit, then 'award' us half marks of it. It is so unfair !! then other classes completed 2 questions ad got full marks, we were like doing 3 questions got 7marks . Wat logic is this ?? We learnt so many logic gates in this unit, and u give me shit logic. =.='' (sorry to be rude ) Till then, ciaoz